As an information-oriented society has rapidly developed, semiconductor devices capable of rapidly transmitting data to quickly process massive information may be desired. However, when semiconductor devices become highly integrated, the semiconductor devices may have unsuitable characteristics. For example, the length of a gate electrode and the junction depth of source/drain regions can be reduced. Such scaling down of these regions can increase the resistance of a semiconductor device. As a result, it can be difficult to operate the semiconductor device at a high speed and power consumption can increase.
To address these concerns, a method for forming a metal silicide layer comprising metal and silicon on the gate and the source/drain regions can be used. Examples of the metal silicide layer include, but are not limited to, a tungsten silicide layer, a titanium silicide layer, and a cobalt silicide layer. These metal silicide layers may be used alone or in a mixture thereof. Since the cobalt silicide layer can exhibit a low resistance, a low consumption of silicon and a high thermal and chemical stability, cobalt silicide layers have been used in highly-integrated semiconductor devices.
A conventional method of forming a metal silicide layer includes depositing cobalt on a silicon substrate by a physical vapor deposition (PVD) process to form a cobalt layer. The silicon substrate is thermally treated so that cobalt is reacted with silicon to form a cobalt silicide layer. A cobalt silicide target is sputtered in the PVD process to provide a cobalt silicide layer including a reduced degree of impurities. Accordingly, the cobalt silicide layer formed by the PVD process can exhibit a substantial similarity to pure cobalt. Further, the cobalt silicide layer formed by silicidating the cobalt layer can possess a low resistance.
The cobalt silicide layer formed by the PVD process, however, has relatively poor step coverage in view of the process characteristics. Under these conditions, the cobalt layer may not be formed with a uniform thickness. Thus, uniformly forming a cobalt layer on a minute and irregular pattern may be problematic. Since the cobalt layer may typically be formed on the minute and irregular pattern and an inner wall of a contact hole, the PVD process may be less effective for forming the desired cobalt layer.
Moreover, when the cobalt layer has an irregular thickness, the cobalt silicide layer formed from the cobalt layer may also have an irregular thickness so that semiconductor devices on the substrate have various operation characteristics, which can negatively affect reliability of the semiconductor device.
Methods for forming a cobalt layer having improved step coverage have been suggested. For example, the cobalt layer can be formed by a chemical vapor deposition (CVD) process or an atomic layer deposition (ALD) process.
However, precursors for forming the cobalt layer may include carbon or oxygen as well as cobalt. Thus, the cobalt layer formed by the CVD process or the ALD process can include an increased quantity of impurities compared to that formed by the PVD process. The cobalt layer having an increased quantity of impurities may possess a relatively high resistance so that the CVD process and the ALD process, in addition to the PVD process, may be less effective for forming the desired cobalt layer.
Additionally, oxygen present in the precursor, and other oxygen products created in the CVD process, can be reacted with silicon to oxidize a surface of the silicon substrate, thereby forming an oxide layer at an interface between the surface of the silicon substrate and the cobalt layer. The oxide layer can suppress a reaction between cobalt and silicon in a subsequent silicidation process. Consequently, a cobalt silicide layer may not be formed.